Design of a low noise, low power V-band low noise amplifier in 130 nm SiGe BiCMOS Process Technology

In this paper, a 60 GHz low noise amplifier (LNA) using a 130 nm SiGe BiCMOS process is designed and presented. Common emitter (CE) and cascode topologies are used in the first and second stages respectively to ensure that minimal noise figure (NF) and maximum gain are achieved. To investigate the performance of the CE in relation to the NF, the mathematical analysis of the NF of the first stage is computed. In both stages of the LNA, the base of the transistor is biased using a current mirror. Transmission lines are used in the circuit to mitigate against a poor noise factor by reducing current utilization. The designed LNA realizes a gain of more than 17 dB, NF less than 4.3 dB at 61 GHz, and OIP3/IIP3 better than -22.5/-2.5 dBm. The LNA consumes 5.1 mW of power.