CENTIP3DE: A 64-CORE, 3D STACKED NEAR-THRESHOLD SYSTEM

被引：23

作者：

Dreslinski, Ronald G. ^{[1
]}

Fick, David ^{[2
]}

Giridhar, Bharan ^{[3
]}

Kim, Gyouho ^{[3
]}

Seo, Sangwon ^{[1
]}

Fojtik, Matthew ^{[3
]}

Satpathy, Sudhir ^{[1
]}

Lee, Yoonmyung ^{[1
]}

Kim, Daeyeon ^{[1
]}

Liu, Nurrachman ^{[1
]}

Wieckowski, Michael ^{[1
]}

Chen, Gregory ^{[1
]}

Sylvester, Dennis ^{[3
,4
]}

Blaauw, David ^{[3
,4
]}

Mudge, Trevor ^{[1
]}

机构：

[1] Univ Michigan, Ann Arbor, MI 48109 USA

[2] Univ Michigan, Michigan Integrated Circuits Lab, Ann Arbor, MI 48109 USA

[3] Univ Michigan, Dept Elect Engn, Ann Arbor, MI 48109 USA

[4] Univ Michigan, Dept Comp Sci, Ann Arbor, MI 48109 USA

来源：

IEEE MICRO | 2013年 / 33卷 / 02期

基金：

美国国家科学基金会;

关键词：

advanced technologies; Centip3De; hardware; integrated circuits; low-power design; power management; types and design styles;

D O I：

10.1109/MM.2013.4

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Centip3De uses the synergy between 3D integration and near-threshold computing to create a reconfigurable system that provides both energy-efficient operation and techniques to address single-thread performance bottlenecks. The original Centip3De design is a seven-layer 3D stacked design with 128 cores and 256 mbytes of dram. silicon results show a two-layer, 64-core system in 130-nm technology, which achieved an energy efficiency of 3,930 DMIPS/W.

引用

页码：8 / 16

页数：9

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