Enabling High-Level Synthesis Resource Sharing Design Space Exploration in FPGAs Through Automatic Internal Bitwidth Adjustments

High-level synthesis has some distinct advantages over traditional RT-level VLSI design. One key advantage is its ability to generate microarchitectures with unique area versus performance tradeoffs for the same behavioral description by setting different synthesis options. This is typically called design space exploration (DSE). One of the main ways to explore the design space for a particular behavioral description is by varying the amount of resource sharing allowed. For application-specified integrated circuits, increasing the amount of resource sharing normally leads to slower, but smaller designs, while decreasing the amount of resource sharing, leads to faster, but larger designs as the behavioral description can be further parallelized. In the field-programmable gate array (FPGA) case, this is normally not the case as sharing functional units (FUs) requires the insertion of multiplexers, which are very costly in terms of look up tables, while typical FUs, e.g., adders can very efficiently be mapped on the FPGAs' resources and multipliers can be directly mapped to DSP macros. Hence, for the FPGA case, it traditionally does not make sense to explore the design space by varying the degree of resource sharing. This paper enables the DSE for FPGAs through resource sharing by fixing the bitwidth of selected internal variables and hence limiting the size of some FUs in the design. As it will be shown, the area savings from using smaller FUs, now outweighs the cost of the multiplexers and hence it is possible to achieve smaller microarchitectures. This comes at the expense of introducing potential overflow errors in the design. Experimental results show that our method enables the DSE of FPGAs using resource sharing and measures the error introduced for different types of input data distributions, showing that in some cases the error can be negligible, while in other cases it can be considerable.