A PCI-compatible FPGA-coprocessor for 2D/3D image processing

被引:0
作者
Knittel, G
机构
来源
IEEE SYMPOSIUM ON FPGAS FOR CUSTOM COMPUTING MACHINES, PROCEEDINGS | 1996年
关键词
FPGA-coprocessor; PCI-bus; image processing; graphics accelerator;
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
We present a small-scale FPGA-coprocessor board for PCI-based systems, It features one XC3195A FPGA (<9K gate equivalents), three XC4013 devices (each up to 13K gate equivalents), 2MByte of Flash Memory, 256KByte of high-speed SRAM and a 16-bit high-speed multiply-and-accumulate unit. The board was designed to speed up algorithms from scientific visualization, in particular the visualization of 3D-datasets. Such algorithms show a large number of short integer or bit operations, which can efficiently be off-loaded from the CPU to an FPGA-coprocessor, Although being exactly tailored to our application, the accelerator constitutes a versatile platform for other algorithms from image or speech processing, The PCI-bus provides the necessary transfer bandwidth for dataflow-intensive computations.
引用
收藏
页码:136 / 145
页数:10
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