FPGA Based Elevator Controller with Improved Reliability

被引：1

作者：

Ekanayake, Sithumini ^{[1
]}

Ekanayake, Ruwan ^{[1
]}

Sanjayan, Somasundaram ^{[1
]}

Abeyratne, Sunil G. ^{[1
]}

Dewasurendra, S. D. ^{[1
]}

机构：

[1] Univ Peradeniya, Dept Elect & Elect Engn, Peradeniya, Sri Lanka

来源：

UKSIM-AMSS 15TH INTERNATIONAL CONFERENCE ON COMPUTER MODELLING AND SIMULATION (UKSIM 2013) | 2013年

关键词：

Elevator; FPGA; Verilog; reconfigurable;

D O I：

10.1109/UKSim.2013.128

中图分类号：

TP301 [理论、方法];

学科分类号：

081202 ;

摘要：

This paper introduces a novel method to improve the reliability of a reconfigurable FPGA based elevator controller, which can be used for an elevator with any number of floors, with specified inputs and outputs. It was clear that by simply changing a variable in the HDL code the controller can be generated for an elevator with required number of floors. Thus in this paper the primary implementation and verification procedure is given in detail together with a method to improve the reliability. The flexibility in expansion of designs in an FPGA was considered thoroughly in the proposed reliability improving method. The controller was developed using Verilog HDL throughout the research and a description on the code development is included in the paper. The controller generated was successfully implemented on a Xilinx Spartan 3AN FPGA and tested for a prototype elevator with three floors.

引用

页码：260 / 265

页数：6