Nonvolatile memory with a metal nanocrystal/nitride heterogeneous floating-gate

被引:44
|
作者
Lee, C [1 ]
Hou, TH
Kan, ECC
机构
[1] Spans LLC, Sunnyvale, CA 94085 USA
[2] Cornell Univ, Sch Elect & Comp Engn, Ithaca, NY 14853 USA
基金
美国国家科学基金会;
关键词
direct tunneling; nanocrystal/nitride heterogeneous floating-gate; nonvolatile memories;
D O I
10.1109/TED.2005.859615
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Heterogeneous floating-gates consisting of metal nanocrystals and silicon nitride (Si3N4) for nonvolatile memory applications have been fabricated and characterized. By combining the self-assembled An nanocrystals and plasma-enhanced chemical vapor deposition (PECVD) nitride layer, the heterogeneous-stack devices can achieve enhanced retention, endurance, and low-voltage program/erase characteristics over single-layer nanocrystals or nitride floating-gate memories. The metal nanocrystals at the lower stack enable the direct tunneling mechanism during program/erase to achieve low-voltage operation and good endurance, while the nitride layer at the upper stack works as an additional charge trap layer to enlarge the memory window and significantly improve the retention time. The write/erase time of the heterogeneous stack is almost the same as that of the single-layer metal nanocrystals. In addition, we could further enhance the memory window by stacking more nanocrystallnitride heterogeneous layers, as long as the effective oxide thickness from the control gate is still within reasonable ranges to control the short channel effects.
引用
收藏
页码:2697 / 2702
页数:6
相关论文
共 50 条
  • [1] Synthesis and characterization of aerosol silicon nanocrystal nonvolatile floating-gate memory devices
    Ostraat, ML
    De Blauwe, JW
    Green, ML
    Bell, LD
    Brongersma, ML
    Casperson, J
    Flagan, RC
    Atwater, HA
    APPLIED PHYSICS LETTERS, 2001, 79 (03) : 433 - 435
  • [2] Semiconductor nanocrystal floating-gate memory devices
    Dimitrakis, P
    Normand, P
    MATERIALS AND PROCESSES FOR NONVOLATILE MEMORIES, 2005, 830 : 203 - 216
  • [3] NEW APPROACH FOR FLOATING-GATE MOS NONVOLATILE MEMORY
    LEE, HS
    APPLIED PHYSICS LETTERS, 1977, 31 (07) : 475 - 476
  • [4] Nonvolatile nanocrystal floating gate memory with NON tunnel barrier
    Baik, SJ
    Choi, SY
    Chung, UI
    Moon, JT
    ESSDERC 2003: PROCEEDINGS OF THE 33RD EUROPEAN SOLID-STATE DEVICE RESEARCH CONFERENCE, 2003, : 509 - 511
  • [5] Nonvolatile floating-gate memory programming enhancement using well bias
    Makwana, JJ
    Schroder, DK
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2006, 53 (02) : 258 - 262
  • [6] DIFMOS - FLOATING-GATE ELECTRICALLY ERASABLE NONVOLATILE SEMICONDUCTOR MEMORY TECHNOLOGY
    GOSNEY, WM
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 1977, 24 (05) : 594 - 599
  • [7] FLOATING-GATE REPROGRAMMABLE NONVOLATILE EEPROM TECHNOLOGY
    SWEETMAN, D
    ELECTRONIC ENGINEERING, 1995, 67 (819): : 99 - &
  • [8] Floating-Gate Nonvolatile Memory With Ultrathin 5-nm Tunnel Oxide
    Ma, Yanjun
    Deng, Rui
    Nguyen, H.
    Wang, Bin
    Pesavento, Alberto
    Niset, M.
    Paulsen, Ron
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2008, 55 (12) : 3476 - 3481
  • [9] Intrinsic mismatch between floating-gate nonvolatile memory cell and equivalent transistor
    Duane, Russell
    Rafhay, Quentin
    Beug, M. Florian
    van Duuren, Michiel
    IEEE ELECTRON DEVICE LETTERS, 2007, 28 (05) : 440 - 442
  • [10] Organic transistor nonvolatile memory with an integrated molecular floating-gate/tunneling layer
    Xu, Ting
    Guo, Shuxu
    Xu, Meili
    Li, Shizhang
    Xie, Wenfa
    Wang, Wei
    APPLIED PHYSICS LETTERS, 2018, 113 (24)