Novel FPGA Implementation of EPZS Motion Estimation in H.264 AVC

In real time applications such as video streaming, it is important that the video encoding/decoding is fast. It is known, that most of the complexity lies in the H.264 encoder. Motion Estimation (ME) introduces high computational complexity. Enhanced Predictive Zonal Search (EPZS) is one of the best ME algorithms. In this paper an efficient implementation of EPZS ME algorithm. The overall inter prediction process including ME and Motion Compensation (MC) has been carried out. The results of the proposed architecture for EPZS were compared with that of full search motion estimation algorithm for validation. The proposed design of EPZS is implemented in "VHDL", simulated using "ModelSim SE 6.5", synthesized using "Xilinx ISE Design Suite 13.3" and verified using "SIMULINK". The proposed architecture provides a high speed and low hardware complexity implementation of H.264 encoder permitting its use in real-time applications of H.264/AVC standard.