A 60 GHz Power Amplifier with 10 GHz 1-dB Bandwidth and 13.6% PAE in 65 nm CMOS

被引:0
作者
Wang, Tong [1 ]
Mitomo, Toshiya [1 ]
Ono, Naoko [1 ,2 ]
Saigusa, Shigehito [1 ]
Watanabe, Osamu [1 ]
机构
[1] Toshiba Co Ltd, Corp Res & Dev Ctr, Kawasaki, Kanagawa 2128582, Japan
[2] Toshiba Co Ltd, Semicond & Storage Co, Kawasaki, Kanagawa 2128582, Japan
来源
IEICE TRANSACTIONS ON ELECTRONICS | 2013年 / E96C卷 / 06期
关键词
broadband amplifiers; millimeter wave integrated circuits; power amplifiers;
D O I
10.1587/transele.E96.C.796
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A four-stage power amplifier (PA) with 10 GHz 1-dB bandwidth (56-66 GHz) is presented. The broadband performance is achieved owing to pi-section interstage matching network. Three-stage-current-reuse topology is proposed to enhance efficiency. The amplifier has been fabricated in 65 nm digital CMOS. 18 dB power gain and 9.6 dBm saturated power (Psat) are achieved at 60 GHz. The PA consumes current of 50 mA at 1.2 V supply voltage, and has a peak power-added efficiency (PAE) of 13.6%. To the best of the authors' knowledge, this work shows the highest PAE among the reported CMOS PAs that covers the worldwide 9 GHz ISM millimeter-wave band with less-than-1.2V supply voltage.
引用
收藏
页码:796 / 803
页数:8
相关论文
共 18 条
  • [1] A 60GHz Transformer Coupled Amplifier in 65nm Digital CMOS
    Boers, Michael
    [J]. 2010 IEEE RADIO FREQUENCY INTEGRATED CIRCUITS RFIC SYMPOSIUM, 2010, : 343 - 346
  • [2] Chan W.L., 2009, IEEE INT SOL STAT CI, P428
  • [3] Chowdhury Debopriyo, 2008, 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers, P560, DOI 10.1109/ISSCC.2008.4523306
  • [4] 60GHz CMOS Power Amplifier with 20-dB-Gain and 12dBm Psat
    Dawn, Debasis
    Sarkar, Saikat
    Sen, Padmanava
    Perumana, Bevin
    Leung, Matthew
    Mallavarpu, Navin
    Pinel, Stephane
    Laskar, Joy
    [J]. 2009 IEEE/MTT-S INTERNATIONAL MICROWAVE SYMPOSIUM, VOLS 1-3, 2009, : 537 - 540
  • [5] The invariance of characteristic current densities in nanoscale MOSFETs and its impact on algorithmic design methodologies and design porting of Si(Ge) (Bi)CMOS high-speed building blocks
    Dickson, Timothy O.
    Yau, Kenneth H. K.
    Chalvatzis, Theodoros
    Mangan, Alain M.
    Laskin, Ekaterina
    Beerkens, Rudy
    Westergaard, Paul
    Tazlauanu, Mihai
    Yang, Ming-Ta
    Voinigescu, Sorin P.
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2006, 41 (08) : 1830 - 1845
  • [6] Jiashu Chen, 2011, 2011 IEEE International Solid-State Circuits Conference (ISSCC 2011), P432, DOI 10.1109/ISSCC.2011.5746385
  • [7] Jie-Wei Lai, 2010, 2010 IEEE International Solid-State Circuits Conference (ISSCC), P424, DOI 10.1109/ISSCC.2010.5433870
  • [8] Kurita N, 2009, IEEE RAD FREQ INTEGR, P31
  • [9] Law Chi Y., 2010, 2010 IEEE International Solid-State Circuits Conference (ISSCC), P426, DOI 10.1109/ISSCC.2010.5433882
  • [10] Liu J. Y.-C., 2011, IEEE RFIC S JUN, P423