Circuit modeling of isolation in flip-chip microwave integrated circuits

被引：0
|
作者：
Ito, R
Jackson, RW
机构：
来源：
ELECTRICAL PERFORMANCE OF ELECTRONIC PACKAGING | 1997年
关键词：
D O I：
10.1109/EPEP.1997.634074
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A circuit model for multi-port flipped-chip packaging of microwave integrated circuits is described. The model topology includes the effect of non-ideal isolation between IC ports and predicts resonance behavior in the millimeterwave range. Measurements of a scale model four port are used for verification.
引用
收藏
页码：217 / 220
页数：4
相关论文
共 50 条
  • [41] Backside probing of flip-chip circuits using electrostatic force sampling
    Qi, R
    Thomson, DJ
    Bridges, GE
    MICROELECTRONICS RELIABILITY, 2000, 40 (06) : 997 - 1003
  • [42] RF and mechanical characterization of flip-chip interconnects in CPW circuits with underfill
    Feng, ZP
    Zhang, WG
    Su, BZ
    Gupta, KC
    Lee, YC
    IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, 1998, 46 (12) : 2269 - 2275
  • [43] Building blocks of a flip-chip integrated superconducting quantum processor
    Kosen, Sandoko
    Li, Hang-Xi
    Rommel, Marcus
    Shiri, Daryoush
    Warren, Christopher
    Gronberg, Leif
    Salonen, Jaakko
    Abad, Tahereh
    Biznarova, Janka
    Caputo, Marco
    Chen, Liangyu
    Grigoras, Kestutis
    Johansson, Goran
    Kockum, Anton Frisk
    Krizan, Christian
    Lozano, Daniel Perez
    Norris, Graham J.
    Osman, Amr
    Fernandez-Pendas, Jorge
    Ronzani, Alberto
    Roudsari, Anita Fadavi
    Simbierowicz, Slawomir
    Tancredi, Giovanna
    Wollraff, Andreas
    Eichler, Christopher
    Govenius, Joonas
    Bylander, Jonas
    QUANTUM SCIENCE AND TECHNOLOGY, 2022, 7 (03):
  • [44] A Circuit Edit Method for ICs of Flip-Chip/Multilayer Interconnected Structure
    Lin X.
    Zhang X.
    Gao R.
    Huanan Ligong Daxue Xuebao/Journal of South China University of Technology (Natural Science), 2020, 48 (12): : 63 - 71
  • [45] Failure of Flip-Chip Circuit Interconnects under High Current Density
    Lu, Yudong
    He, Xiaoqi
    En, Yunfei
    Wang, Xin
    Zhuang, Zhiqiang
    MATERIALS AND PRODUCT TECHNOLOGIES, 2010, 118-120 : 449 - +
  • [46] Organic circuit board substrates with solder deposits for flip-chip assembly
    Maiwald, W.J.
    Galvanotechnik, 1998, 89 (08): : 2731 - 2737
  • [47] Chemothermal modeling and finite-element analysis for microwave cure process of underfill in flip-chip packaging
    Liu, L
    Yi, S
    Ong, LS
    Chian, KS
    Osiyemi, S
    Lim, SH
    Su, F
    IEEE TRANSACTIONS ON ELECTRONICS PACKAGING MANUFACTURING, 2005, 28 (04): : 355 - 363
  • [48] Recent advances in modeling the underfill process in flip-chip packaging
    Wan, J. W.
    Zhang, W. J.
    Bergstrom, D. J.
    MICROELECTRONICS JOURNAL, 2007, 38 (01) : 67 - 75
  • [49] Solder Fatigue Modeling of Flip-Chip Bumps in Molded Packages
    Shim, Kar Wei
    Lo, Wai Yew
    IEMT 2006: 31ST INTERNATIONAL CONFERENCE ON ELECTRONICS MANUFACTURING AND TECHNOLOGY, 2006, : 109 - 114
  • [50] Flip-chip GaAs MMICs for microwave MCM-D applications
    Wadsworth, SD
    Buck, BJ
    Dearn, AW
    Warner, DJ
    Juland, ID
    1998 INTERNATIONAL CONFERENCE ON MULTICHIP MODULES AND HIGH DENSITY PACKAGING, PROCEEDINGS, 1998, : 273 - 278
12345