Dynamic speculative precomputation

被引:58
作者
Collins, JD [1 ]
Tullsen, DM [1 ]
Wang, H [1 ]
Shen, JP [1 ]
机构
[1] Univ Calif San Diego, Dept Comp Sci & Engn, La Jolla, CA 92093 USA
来源
34TH ACM/IEEE INTERNATIONAL SYMPOSIUM ON MICROARCHITECTURE, MICRO-34, PROCEEDINGS | 2001年
关键词
D O I
10.1109/MICRO.2001.991128
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
A large number of memory accesses in memory-bound applications are irregular such as pointer dereferences, and can be effectively targeted by thread-based prefetching techniques like Speculative Precomputation. These techniques execute instructions, for example on an available SMT thread context, that have been extracted directly from the program they are trying to accelerate. Proposed techniques typically require manual user intervention to extract and optimize instruction sequences. This paper proposes Dynamic Speculative Precomputation, which performs all necessary instruction analysis, extraction, and optimization through the use of back-end instruction analysis hardware, located off the processor's critical path. For a set of memory limited benchmarks an average speedup of 14% is achieved when constructing simple p-slices, and this gain grows to 33% when making use of aggressive optimizations.
引用
收藏
页码:306 / 317
页数:12
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