Design of a programmable CMOS Charge-Pump for phase-locked loop synthesizers

被引：2
|
作者：
de Jesus Gomez-Cruz, Jorge [1 ]
Sanchez-Hernandez, Fernando [1 ]
Guillermo Gomez-Mora, Luis [1 ]
Juarez-Hernandez, Esdras [2 ]
Martinez-Guerrero, Esteban [1 ]
机构：
[1] ITESO, Perifer Sur Manuel Gomez Morin 8585, Tlaquepaque 45090, Jalisco, Mexico
[2] Freescale Semicond Mexico, Jalisco 45600, Mexico
来源：
2012 IBEROAMERICAN CONFERENCE ON ELECTRONICS ENGINEERING AND COMPUTER SCIENCE | 2012年 / 3卷
关键词：
analog electronic design; integrated circuits; charge pump; PLLs; circuit simulation;
D O I：
10.1016/j.protcy.2012.03.025
中图分类号：
TP301 [理论、方法];
学科分类号：
081202 ;
摘要：
A charge pump circuit capable of operating at different switching speed is presented. The switching speed control is added to a typical charge pump circuit by mean of enable switches which allow drive different currents. Charge pump circuit is implemented in AMI 0.5 mu m CMOS technology. Simulations were performed using Spectre from Cadence (TM). Simulation results show clearly an increase in the slope of charging or discharging curves of load capacitor during the pumping-up and pumping- down phases. (C) 2012 Published by Elsevier Ltd.
引用
收藏
页码：235 / 240
页数：6
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