A Gm-C Delta-Sigma Modulator With a Merged Input-Feedback Gm Circuit for Nonlinearity Cancellation and Power Efficiency Enhancement

被引:11
作者
Basak, Debajit [1 ]
Li, Daxiang [1 ]
Pun, Kong-Pang [1 ]
机构
[1] Chinese Univ Hong Kong, Dept Elect Engn, Hong Kong, Hong Kong, Peoples R China
关键词
Continuous-time delta sigma modulator; Gm-C circuit; power efficiency; nonlinearity cancellation; SIGNAL BANDWIDTH; FIR FEEDBACK; COMPENSATION; CONVERTERS; RANGE; ADC;
D O I
10.1109/TCSI.2017.2740501
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Traditionally, a transconductor-C (Gm-C)-based delta sigma modulator (DSM) has its performance limited by the nonlinearity of its Gm circuits. To achieve sufficient linearity, source degeneration is typically applied to a Gm circuit, which inevitably reduces the Gm circuit's transconductance and thermal noise efficiencies. This paper presents new ways to change this paradigm. First, a DSM topology that has a passive RC lowpass filter (LPF) in its feedback is applied. We place the cutoff frequency of the LPF at the signal band edge to realize a pole of the DSM's loop filter, thus reducing the power consumption. The LPF also suppresses the high-frequency components of quantization noise, enabling us to use a nonlinear Gm circuit in the DSM's feedback while not causing quantization noise to fold into the signal band. With matched transfer characteristics and inputs, the input and feedback Gm circuits have their nonlinearities canceled with each other. Second, a merged input-feedback Gm circuit with shared degeneration resistors is proposed, which has high transconductance and noise efficiencies and simultaneously allows large input and feedback signals. A prototype DSM fabricated in a 0.18-mu m CMOS process demonstrates the nonlinearity cancellation and power efficiency of the proposed methods.
引用
收藏
页码:1196 / 1209
页数:14
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