CD control using SiON BARL processing for sub-0.25 μm lithography

被引:0
作者
Zhang, F
de Beeck, MO
Schaekers, M
Ronse, K
Conley, W
Gopalan, P
Gangala, H
Dusa, M
Bendik, J
机构
[1] IMEC, B-3001 Louvain, Belgium
[2] Cypress Semicond, San Jose, CA 95134 USA
[3] Natl Semicond Co, Santa Clara, CA 95052 USA
关键词
D O I
10.1016/S0167-9317(99)00013-1
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, various contributions to the reflection variation at the resist/BARL interface are investigated. Not only deviations in the optical parameters (n, k, thickness T) of the BARL are causing variations in reflectivity, but also thickness variations of transparent layers underneath the BARL. Furthermore, the impact of substrate reflectivity on CD variation for 0.2 mu m features is investigated, using various SiON layers. Since substrate reflectivity has to be very low for good CD control, and since some reflectivity variations can be unavoidable, the use of a TAR layer in combination with BARL is proposed as a simple solution to maintain good CD control on real product wafers.
引用
收藏
页码:51 / 54
页数:4
相关论文
共 1 条
[1]  
OPDEBEECK M, 1998, P SPIE MICROLITHOGRA, V3334