A low-power inverter-based ΣΔ analog-to-digital converter for audio applications

被引:0
作者
Liu XiaoPeng [1 ]
Han Yan [1 ]
Han XiaoXia [1 ]
Luo Hao [1 ]
Cheung, Ray C. C. [2 ]
Cao TianLin [1 ]
机构
[1] Zhejiang Univ, Inst Microelect & Photoelect, Hangzhou 310027, Zhejiang, Peoples R China
[2] City Univ Hong Kong, Dept Elect Engn, Hong Kong 999077, Hong Kong, Peoples R China
基金
中国国家自然科学基金;
关键词
Sigma Delta ADC; class-C inverter; low-power; high-resolution; gain-boost; ADC;
D O I
10.1007/s11432-013-4999-y
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
This paper presents a design for a low-power, high-resolution audio Sigma Delta analog-to-digital converter (ADC) based on a novel gain-boost class-C inverter. The gain-boost class-C inverter behaves as a sub-threshold amplifier, thereby minimizing power dissipation. The proposed ADC chip is fabricated in a SMIC 65-nm CMOS process with a die area of 0.63 mm(2). With 1.2 V of supply voltage, the ADC chip achieves a peak signal-to-noise-plus-distortion-ratio (SNDR) of 92 dB and a dynamic range (DR) of 97 dB over the 20 kHz audio band, consuming only 1.13 mW. These results make the ADC particularly suitable for portable electronics applications.
引用
收藏
页码:1 / 10
页数:10
相关论文
共 15 条
  • [1] Bult K., 1991, Analog Integrated Circuits and Signal Processing, V1, P119, DOI 10.1007/BF00161305
  • [2] Low Voltage, Low Power, Inverter-Based Switched-Capacitor Delta-Sigma Modulator
    Chae, Youngcheol
    Han, Gunhee
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2009, 44 (02) : 458 - 472
  • [3] A decimation filter design and implementation for oversampled sigma delta A/D converters
    Chen, L
    Zhao, YF
    Gao, DY
    Wen, W
    Wang, ZM
    Zhu, XF
    Peng, HP
    [J]. PROCEEDINGS OF 2005 IEEE INTERNATIONAL WORKSHOP ON VLSI DESIGN AND VIDEO TECHNOLOGY, 2005, : 55 - 58
  • [4] A 101-dB SNR Hybrid Delta-Sigma Audio ADC using Post Integration Time Control
    Choi, Moo-Yeol
    Lee, Sung-No
    You, Seung-Bin
    Yeum, Wang-Seup
    Park, Ho-Jin
    Kim, Jae-Whui
    Lee, Hae-Seung
    [J]. PROCEEDINGS OF THE IEEE 2008 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 2008, : 89 - +
  • [5] Kim J. -S., 2011, 2011 INT SOC DESIGN, P73
  • [6] Liao L., 2013, SPE ANN TECHN C EXH, P1
  • [7] Low-power design and application based on CSD optimization for a fixed coefficient multiplier
    Liu HongXia
    Yuan Bo
    [J]. SCIENCE CHINA-INFORMATION SCIENCES, 2011, 54 (11) : 2443 - 2453
  • [8] A continuous-time/discrete-time mixed audio-band sigma delta ADC
    Liu Yan
    Hua Siliang
    Wang Donghui
    Hou Chaohuan
    [J]. JOURNAL OF SEMICONDUCTORS, 2011, 32 (01)
  • [9] Bulk-compensated technique and its application to subthreshold ICs
    Luo, H.
    Han, Y.
    Cheung, R. C. C.
    Han, X.
    Zhu, D.
    [J]. ELECTRONICS LETTERS, 2010, 46 (16) : 1105 - 1106
  • [10] Luo H, 2011, P EDSSC NOV 2011, P1