Pulse-Biased Low-Power Low-Phase-Noise UHF LC-QVCO for 866 MHz RFID Front-End

被引:9
|
作者
Li, Jie [1 ]
Hasan, S. M. Rezaul [1 ]
机构
[1] Massey Univ, Ctr Res Analog & VLSI Microsyst Design CRAVE, Auckland, New Zealand
关键词
Folded cascode; low power; 1/f noise; phase noise; pulsed biasing; quadrature voltage-controlled oscillator (QVCO); QUADRATURE VCO; CMOS; DESIGN;
D O I
10.1109/TMTT.2012.2209441
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper discusses an 866-MHz UHF quadrature voltage-controlled oscillator (QVCO) for RFID front-end. The VCO achieved an improved phase noise performance of -130 dBc/Hz at a carrier-offset of 1 MHz using an improved architecture employing pulsed self-biasing. It was fabricated using the IBM 130-nm CMOS process with the core VCO occupying around 0.36 mm(2) die area. The loading effect of finite g(ds) for nanometric CMOS design was also considered. The VCO achieved 8% tuning range with very low quadrature error. It was tested using a power supply in the range of 0.6-1 V, drawing a maximum of 2.5 mW. In addition, it achieved a figure of merit of -185 dBc/Hz.
引用
收藏
页码:3120 / 3125
页数:6
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