45 GHz Low Power Static Frequency Divider in 90 nm CMOS

被引：0

作者：

Ali, Mohammed K. ^{[1
]}

Hamidian, Amin ^{[1
]}

Shu, Ran ^{[1
]}

Malignaggi, Andrea ^{[1
]}

Boeck, Georg ^{[1
]}

机构：

[1] Berlin Inst Technol, Microwave Engn Lab, Berlin, Germany

来源：

PROCEEDINGS OF THE 2012 IEEE INTERNATIONAL SYMPOSIUM ON RADIO-FREQUENCY INTEGRATION TECHNOLOGY (RFIT) | 2012年

关键词：

Static Frequency Divider; Inductive peaking; Splitting resistor; Q-Band;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This work presents the design of a Q-band static frequency divider with quadrature signal output suitable for 60 GHz application. The RF performance improvement and power consumption reduction is achieved by using inductive peaking, resistor splitting techniques as well as proper transistor sizing. The static frequency divider is realized in a 90 nm CMOS technology with a chip area of 0.60x0.75 mm(2). The self-oscillation frequency is 20.5 GHz with 12 GHz locking range. -16 dBm output power with less than -1 dBm input sensitivity were measured. The static frequency divider core and the output buffers consume 6.9 mW and 1.2 mW respectively from a 1.2 V power supply.

引用

页码：65 / 67

页数：3

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