IP Core Based on the Kalman Filter Algorithm in the FPGA Implementation

被引：1

作者：

Zhao, Xue ^{[1
]}

Liu, Quan ^{[1
]}

Wang, Xiaofei ^{[1
]}

机构：

[1] BISTU, Coll Mechitrone Engn, Beijing 100192, Peoples R China

来源：

MANUFACTURING PROCESS AND EQUIPMENT, PTS 1-4 | 2013年 / 694-697卷

关键词：

Kalman filtering; FPGA; IP core;

D O I：

10.4028/www.scientific.net/AMR.694-697.1093

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

This article discusses one-dimensional Kalman filter algorithm using FPGA hardware IP core implementation process. First of all, to program the FPGA matrix operations, implementation of double precision floating point. Then the Kalman filter algorithm programmed in MATLAB, to verify the correctness of the algorithm thinking. Finally the MATLAB language programming algorithm is converted into VHDL language. And call 64 a double precision floating point data algorithm realizes the design of 1-D Kalman filtration algorithm IP core, which make the Kalman filter meet the high precision as well as high speed to complete complex algorithm.

引用

页码：1093 / 1097

页数：5