Superpipelined high-performance optical-flow computation architecture

被引:39
|
作者
Diaz, Javier [1 ]
Ros, Eduardo [1 ]
Agis, Rodrigo [1 ]
Luis Bernier, Jose [1 ]
机构
[1] Univ Granada, Dept Comp Architecture & Technol, ETSI Informat, E-18071 Granada, Spain
关键词
Image motion analysis; Real-time systems; FPGAs; Architecture of vision systems;
D O I
10.1016/j.cviu.2008.05.006
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
Optical-flow computation is a well-known technique and there are important fields in which the application of this visual modality commands high interest. Nevertheless, most real-world applications require real-time processing. all issue which has only recently been addressed. Most real-time systems described to date use basic models which limit their applicability to generic tasks, especially when fast motion is presented or when subpixel motion resolution is required. Therefore, instead of implementing a complex optical-flow approach, we describe here a very high-frame-rate optical-flow processing system. Recent advances in image sensor technology make it possible nowadays to use high-frame-rate sensors, to properly sample fast motion (i.e. as a low-motion scene), which makes a gradient-based approach one of the best options in terms Of accuracy and comsumption of resources for any real-time implementation. Taking advantage of the regular data now of this kind of algorithm, our approach implements a novel superpipelined. fully parallelized architecture for optical-flow processing. The system is fully working and is organized into More than 70 pipeline stages, which achieve a data throughput of one pixel per clock cycle. This computing scheme is well suited to FPGA technology and VLSI implementation. The developed Customized DSP architecture is capable of processing up to 170 frames per second at a resolution of 800 600 pixels. We discuss the advantages of high-frame-rare processing and justify the optical-flow model chosen for the implementation. We analyze this architecture, measure the system resource requrements Using FPGA devices and finally evaluate the system's performance and compare it with other approaches described in the literature. (c) 2008 Elsevier Inc. All rights reserved.
引用
收藏
页码:262 / 273
页数:12
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