A 10 GS/s, 3-Bit ADC with Novel Decoder in SiGe BiCMOS Technology

被引：0

作者：

Shen, Yu ^{[3
,4
]}

Zhang, Yi ^{[1
,2
,3
,4
,5
]}

Yang, Lei ^{[1
,6
]}

Yang, Yanhui ^{[3
,4
]}

Guo, Yufeng ^{[1
,3
,4
]}

Li, Xiaopeng ^{[1
,6
]}

Zhang, Youtao ^{[1
,6
]}

机构：

[1] Natl & Local Joint Engn Lab RF Integrat & Microas, Nanjing 210023, Jiangsu, Peoples R China

[2] State Key Lab Millimeter Waves, Nanjing 210096, Jiangsu, Peoples R China

[3] Nanjing Univ Posts & Telecommun, Coll Elect & Opt Engn, Nanjing 210023, Jiangsu, Peoples R China

[4] Nanjing Univ Posts & Telecommun, Coll Microelect, Nanjing 210023, Jiangsu, Peoples R China

[5] JiangSu HengXin Technol Co Ltd, Postdoctoral Res Ctr, Yixing 214222, Peoples R China

[6] Nanjing GB Elect Co Ltd, Nanjing 210016, Jiangsu, Peoples R China

来源：

2018 3RD IEEE INTERNATIONAL CONFERENCE ON INTEGRATED CIRCUITS AND MICROSYSTEMS (ICICM) | 2018年

关键词：

flash ADC; SiGe BiCMOS; differential decoder; 10; GS/s;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents a design of 10-GS/s, 3-bit analog-to-digital converter in a 0.13 mu m SiGe BiCMOS technology for optical communication application. This fully differential flash ADC includes a wide-bandwidth track-and-hold amplifier, a high-resolution comparator array and a novel differential decoder. By using our novel differential decoder, this ADC design achieves better than 2.8 effective bits for lower input frequencies and 2.5 effective bits for 1 GHz input frequency at a sampling rate of 10 GS/s. This ADC consumes 1.6 W with a 10 GS/s clock rate, while operating from -5/-3.3 V power supplies and its core area is only occupies 1x1.2 mm(2).

引用

页码：196 / 200

页数：5

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