Timing Yield Slack for Timing Yield-Constrained Optimization and Its Application to Statistical Leakage Minimization

被引:10
作者
Hwang, Eun Ju [1 ]
Kim, Wook [1 ]
Kim, Young Hwan [1 ,2 ]
机构
[1] Pohang Univ Sci & Technol, Pohang 790784, South Korea
[2] Univ Calif Berkeley, Berkeley, CA 94720 USA
关键词
Process variation; statistical design; statistical leakage minimization; statistical optimization; statistical static timing analysis (SSTA); timing yield-constrained optimization; timing yield slack; FULL-CHIP LEAKAGE; POWER; VARIABILITY; CIRCUITS; ACCURATE; VOLTAGE;
D O I
10.1109/TVLSI.2012.2220792
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This paper focuses on statistical optimization and, more specifically, timing yield (TY)-constrained optimization. For cell replacement in timing-constrained optimization, we need an indicator that examines whether or not a timing violation occurs and gives the available timing for a gate. In deterministic optimization, the timing slack is used for this indicator. Although there is an analogous concept of TY slack in statistical optimization, it has not been well utilized. This paper proposes an effective way to use the TY slack for successful statistical optimization. To achieve this, we present an efficient method to calculate the TY slacks of gates and a strategy that uses timing resources for effective statistical optimization. Based on this work, we propose a novel statistical leakage minimization method that uses the TY slack for a gate change metric. The use of TY-based metrics that are appropriate for statistical design ensures that our method has a better optimization performance at a higher speed. Experimental results on ISCAS-85 benchmark circuits show that the leakage minimization method reduces leakage by 25.2% compared to the statistical benchmark method. In addition, our method has a better runtime when the number of gates is high.
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页码:1783 / 1796
页数:14
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