SMASH-MASH Delta-Sigma Modulator using Noise-Shaping Quantizers

被引：0

作者：

Han, Changsok ^{[1
]}

Kim, Taewook ^{[1
]}

Maghari, Nima ^{[1
]}

机构：

[1] Univ Florida, Dept Elect & Comp Engn, Gainesville, FL 32611 USA

来源：

2016 14TH IEEE INTERNATIONAL NEW CIRCUITS AND SYSTEMS CONFERENCE (NEWCAS) | 2016年

关键词：

analog-to-digital converters; digital-to-analog converters; delta-sigma modulators; sigma-delta modulator; multi-stage; MASH; VCO quatuizer; noise shaping quantizer; noise transfer function;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this paper, a new multi-loop delta-sigma modulator is proposed. The proposed modulator combines the use of digital filters in a multi-stage noise-shaping (MASH) structure with an in-loop digital addition of Sturdy-MASH (SMASH) modulators. This structure works with any types of modulator loops and quantizers and integrates exceptionally well with noise-shaping quantizers where the traditional SMASH fails. Furthermore, the proposed modulator relaxes the critical analog/digital matching problem of the MASH modulators while providing excellent stability. Simulation results and mathematical analysis are provided to demonstrate the effectiveness of the proposed structure.

引用

页数：4

共 10 条

[1]

Han C, 2015, IEEE INT SYMP CIRC S, P321, DOI 10.1109/ISCAS.2015.7168635

[2] Time-Interleaved Noise-Coupling Delta-Sigma Modulator Using Modified Noise-Shaped Integrating Quantizer [J].

Han, Changsok ;

Maghari, Nima .

IEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS, 2015, 5 (04) :548-560

[3] Sturdy MASH Δ-Σ modulator [J].

Maghari, N. ;

Kwon, S. ;

Temes, G. C. ;

Moon, U. .

ELECTRONICS LETTERS, 2006, 42 (22) :1269-1270

[4] A Third-Order DT ΔΣ Modulator Using Noise-Shaped Bi-Directional Single-Slope Quantizer [J].

Maghari, Nima ;

Moon, Un-Ku .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2011, 46 (12) :2882-2891

[5] 74 dB SNDR Multi-Loop Sturdy-MASH Delta-Sigma Modulator Using 35 dB Open-Loop Opamp Gain [J].

Maghari, Nima ;

Kwon, Sunwoo ;

Moon, Un-Ku .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2009, 44 (08) :2212-2221

[6]

Schreier Richard, 2005, Understanding Delta-Sigma Data Converters

[7] A 12-bit, 10-MHz bandwidth, continuous-time ΣΔ ADC with a 5-bit, 950-MS/s VCO-based quantizer [J].

Straayer, Matthew Z. ;

Perrott, Michael H. .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2008, 43 (04) :805-814

[8] A Mostly-Digital Variable-Rate Continuous-Time Delta-Sigma Modulator ADC [J].

Taylor, Gerry ;

Galton, Ian .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2010, 45 (12) :2634-2646

[9] A 0.22 psrms Integrated Noise 15 MHz Bandwidth Fourth-Order ΔΣ Time-to-Digital Converter Using Time-Domain Error-Feedback Filter [J].

Yu, Wonsik ;

Kim, KwangSeok ;

Cho, SeongHwan .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2015, 50 (05) :1251-1262

[10] A 12.5-bit 4 MHz 13.8 mW MASH ΔΣ Modulator With Multirated VCO- Based ADC [J].

Zaliasl, Samira ;

Saxena, Saurabh ;

Hanumolu, Pavan Kumar ;

Mayaram, Kartikeya ;

Fiez, Terri S. .

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2012, 59 (08) :1604-1613

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