共 6 条
- [1] Architectural Modeling of a Single-Sideband Wireline Serial Data Transceiver for Multi-Drop I/O 2016 12TH CONFERENCE ON PH.D. RESEARCH IN MICROELECTRONICS AND ELECTRONICS (PRIME), 2016,
- [4] Analysis, Optimization, and Modeling of Analog Multi-Tone Serial Data Transceivers 2017 13TH CONFERENCE ON PH.D. RESEARCH IN MICROELECTRONICS AND ELECTRONICS (PRIME), 2017, : 301 - 304
- [5] A 7.5mW 7.5Gb/s Mixed NRZ/Multi-Tone Serial-Data Transceiver for Multi-Drop Memory Interfaces in 40nm CMOS 2015 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE DIGEST OF TECHNICAL PAPERS (ISSCC), 2015, 58 : 180 - U249
- [6] A 4x9 Gb/s 1 pJ/b NRZ/Multi-Tone Serial-Data Transceiver with Crosstalk Reduction Architecture for Multi-Drop Memory Interfaces in 40nm CMOS 2015 SYMPOSIUM ON VLSI CIRCUITS (VLSI CIRCUITS), 2015,