Chip-underfill Interfaces of Flip Chip Plastic Ball Grid Array Packages

High performance electronic packages sometimes fail due to interfacial adhesion degradation during reliability tests. A chip is placed onto a laminate chip carrier in the case of flip chip plastic ball grid array (FC-PBGA) packages. When a flux with pimelic acid is used in a flip chip joining process of a FC-PBGA, it reacts with SnO and SnO2 on chip solder balls or the eutectic paste of the laminate to yield organotin compounds including tin pimelate. There is also minor residue such as tin oxides. The flux residue deposits onto polyimide (PI) which is the passivation layer of integrated circuit chips. In order to improve the reliability of such packages, underfill is introduced into the gap between chip and laminate. The reliability of the underfilled module is tested by subjecting to JEDEC preconditioning at 30 deg.C and 60% relative humidity followed by a solder reflow process at 220-260 deg.C. C-mode scanning acoustic microscopy (CSAM) on such modules shows some delaminated areas at the chip-underfill interface. It is proposed that JEDEC preconditioning of an FC-PBGA package introduces water molecules that accumulate at the flux residue-underfill interface. The interactions between the PI surface and the underfill are broken. Thus, the interface is weakened. Various types of mechanical stresses, which increase during subsequent solder reflow, cause the weakened interfaces to delaminate.