Modeling of strain effects on the device behaviors of ferroelectric memory field-effect transistors

The influence of strains on the channel current-gate voltage behaviors and memory windows of ferroelectric memory field-effect transistors (FeMFETs) were studied using an improved model based on the Landau-Devonshire theory. 'Channel potential-gate voltage' ferroelectric polarization and silicon surface potential diagrams were constructed for strained single-domain BaTiO3 FeMFETs. The compressive strains can increase (or decrease) the amplitude of transistor currents and enlarge memory windows. However, tensile strains only decrease the maximum value of transistor currents and compress memory windows. Mismatch strains were found to have a significant influence on the electrical behaviors of the devices, therefore, they must be considered in FeMFET device designing.