A VLSI-Efficient Signed Magnitude Comparator for {2n-1, 2n,2n+1-1} RNS

被引:0
作者
Kumar, Sachin [1 ]
Chang, Chip-Hong [1 ]
机构
[1] Nanyang Technol Univ, Sch Elect & Elect Engn, Singapore, Singapore
来源
2016 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS) | 2016年
关键词
RESIDUE NUMBER SYSTEM; CHINESE REMAINDER THEOREM; ALGORITHM;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Comparison of residue representations in signed Residue Number System (RNS) involves sign detection and magnitude comparison. Both are difficult operations in RNS. This paper proposes a new signed magnitude comparator for the three-moduli set RNS {2(n)-1, 2(n), 2(n+1)-1}. Two subrange identifiers are computed to simplify sign detection and accelerate the magnitude comparison without requiring full reverse conversion, large modulo adders or lookup tables. Synthesis results in 65 nm CMOS standard cell implementation show that it even outperforms the most efficient unsigned magnitude comparator for equally balanced special three-moduli set by significant margin in terms of area, delay and power consumption.
引用
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页码:1966 / 1969
页数:4
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