21%-Efficient n-type rear-junction PERT solar cell with industrial thin 156mm Cz single crystalline silicon wafer

We have achieved 21.2% efficiency, and 670 mV open-circuit voltage(calibrated in Fraunhofer ISE) of n-type rear junction(RJ) PERT (Passivated Emitter Rear Totally-diffused) solar cell with plated Ni/Ag contacts, Al2O3 rear passivation, and screen-printed local Al BSF on industrial 180 mu m-thickness 6-inch n-type Czochralski (Cz) single crystalline silicon wafer. Also 21.0% efficiency and 669 mV open-circuit voltages was achieved with 125 mu m-thickness wafer. Effects of borosilicateglass (BSG) deposited by APCVD in different B2H6 gas flow rate and the influence of O-2 addition during furnace tube anneal were studied in terms of not only boron emitter quality but also impact on the cell Voc and FF. We found that, at fixed diffusion temperature, surface boron concentration could be controlled mainly by changing B2H6 flow rate during BSG deposition by APCVD and subsidiary by O-2 addition in the tube furnace anneal. Additionally, as risks of n-type mass production, the 6 '' n-type wafer quality deviation issue and thin wafer related process issues were discussed. (C) 2015 The Authors. Published by Elsevier Ltd. This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/).