Future technology for advanced MOS devices

被引：22
作者：
Wyon, C [1 ]
机构：
[1] CEA, LETI, Dept Technol Silicum, Sect Caracterisat Phys Chim, F-38054 Grenoble 9, France
来源：
NUCLEAR INSTRUMENTS & METHODS IN PHYSICS RESEARCH SECTION B-BEAM INTERACTIONS WITH MATERIALS AND ATOMS | 2002年 / 186卷
关键词：
CMOS; technology; high kappa; gate stack; ultra-shallow junctions; low kappa; Cu interconnect;
D O I：
10.1016/S0168-583X(01)00908-9
中图分类号：
TH7 [仪器、仪表];
学科分类号：
0804 ; 080401 ; 081102 ;
摘要：
This paper describes some of the future technologies for next generation metal oxide-semiconductor (MOS) devices, focusing on development of new materials. After a brief presentation of the future evolution of lithography tools, results on the development of high K thin films, metal gates for the gate stack, low K materials for Cu interconnects and on the new technologies currently investigated to fabricate ultra-shallow junctions, will be presented. (C) 2002 Elsevier Science B.V.. All rights reserved.
引用
收藏
页码：380 / 391
页数：12
相关论文
共 23 条
[1]  
AGARWAL A, 1997, IEDM
[2]  
[Anonymous], 1999, INT TECHNOLOGY ROADM
[3]   Characterization of sub-30 nm p+/n junction formed by plasma ion implantation [J].
Baek, SK ;
Choi, CJ ;
Seong, TY ;
Hwang, H ;
Kim, HK ;
Moon, DW .
JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 2000, 147 (08) :3091-3093
[4]  
BUSS D, 1999, IEDM
[5]  
CHAU R, 2000, IEDM
[6]   The impact of high-κ gate dielectrics and metal gate electrodes on sub-100 nm MOSFET's [J].
Cheng, BH ;
Cao, M ;
Rao, R ;
Inani, A ;
Voorde, PV ;
Greene, WM ;
Stork, JMC ;
Yu, ZP ;
Zeitzoff, PM ;
Woo, JCS .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1999, 46 (07) :1537-1544
[7]   Annealing of ultrashallow p+/n junction by 248 nm excimer laser and rapid thermal processing with different preamorphization depths [J].
Chong, YF ;
Pey, KL ;
Wee, ATS ;
See, A ;
Chan, L ;
Lu, YF ;
Song, WD ;
Chua, LH .
APPLIED PHYSICS LETTERS, 2000, 76 (22) :3197-3199
[8]  
GANNAVARAM S, 2000, IEDM
[9]  
GOTO KI, 1997, IEDM
[10]  
JOSSE E, 1999, IEDM
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