Efficiency Optimized Asymmetric Half-Bridge Converter with Hold-Up Time Compensation

In this paper, a new asymmetric half-bridge (AHB) converter integrated with hold-up time compensation circuit is proposed. The AHB converter is one of the most promising topologies in low-to-mid power applications because of zero-voltage switching (ZVS) of all switches and small number of components. But when the converter is designed considering the hold-up time condition, it has large transformer offset-current and small transformer turns-ratio. Although many researchers have studied to solve this problem, the advantages of conventional works are limited by losses from additional components. To solve this problem, a new AHB converter with an optimized efficiency is proposed in this paper. Since the proposed converter increases voltage gain using integrated boost converter during the hold-up time, it can be designed to obtain an optimized efficiency in nominal state, without losses from the additional components.