Trans-Capacitance Modeling in Junctionless Symmetric Double-Gate MOSFETs

被引：24
|
作者：
Jazaeri, Farzan [1 ]
Barbut, Lucian [1 ]
Sallese, Jean-Michel [1 ]
机构：
[1] Swiss Fed Inst Technol, CH-1015 Lausanne, Switzerland
来源：
IEEE TRANSACTIONS ON ELECTRON DEVICES | 2013年 / 60卷 / 12期
基金：
瑞士国家科学基金会;
关键词：
ac analysis; capacitance; compact model; double-gate MOSFET; junctionless; nanowire;
D O I：
10.1109/TED.2013.2285013
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
We have developed a closed-form solution for transcapacitances in long-channel junctionless double-gate (JL DG) MOSFET. This approach, which is derived from a coherent charge-based model, was fully validated with technology computer-aided design simulations. According to this paper, a complete intrinsic capacitance network is obtained, which represents an essential step toward ac analysis of circuits based on junctionless devices.
引用
收藏
页码：4034 / 4040
页数：7
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