Timing Validation of Automotive Software

被引:0
|
作者
Kaestner, Daniel [1 ]
Wilhelm, Reinhard [2 ]
Heckmann, Reinhold [1 ]
Schlickling, Marc [1 ,2 ]
Pister, Markus [1 ,2 ]
Jersak, Marek [3 ]
Richter, Kai [3 ]
Ferdinand, Christian [1 ]
机构
[1] AbsInt GmbH, Saarbrucken, Germany
[2] Univ Saarland, D-66123 Saarbrucken, Germany
[3] Symtavis GmbH, Braunschweig, Germany
来源
LEVERAGING APPLICATIONS OF FORMAL METHODS, VERIFICATION AND VALIDATION, PROCEEDINGS | 2008年 / 17卷
关键词
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暂无
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Embedded hard real-time systems need reliable guarantees for the satisfaction of their timing constraints. During the last years sophisticated analysis tools for timing analysis at the code-level, controller-level and networked system-level have been developed. This trend is exemplified by two tools: AbsInt's timing analyzer aiT, and and Symtavision's SymTA/S. aiT determines safe upper bounds for the execution times (WCETs) of non-interrupted tasks. SymTA/S computes the worst-case response times (WCRTs) of an entire system from the task WCETs and from information about possible interrupts and their priorities. A seamless integration between both tools provides for a holistic approach to timing validation: starting from a system model, a designer can perform timing budgeting, performance optimization and timing verification, thus covering both the code arid the system aspects. However, tire precision of the results arid the efficiency of the analysis methods are highly dependent on the predictability of the execution platform. Especially on multi-core architectures this aspect becomes of critical importance. This paper describes an industry-strength tool flow for timing validation, and discusses prerequisites at the hardware level for ascertaining high analysis precision.
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页码:93 / +
页数:4
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