Design and Development of Efficient Face Recognition Architecture using Neural Network on FPGA

被引：0
作者：
Ahmed, M. Tousif [1 ]
Sinha, Sanjay [1 ]
机构：
[1] Xvidia Technol, Bengaluru, India
来源：
PROCEEDINGS OF THE 2018 SECOND INTERNATIONAL CONFERENCE ON INTELLIGENT COMPUTING AND CONTROL SYSTEMS (ICICCS) | 2018年
关键词：
FPGA; Face Recognition System(FRS); Neural Networks (NN); Histogram of Oriented Gradients (HOG);
D O I：
暂无
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
Face Recognition is an application used for identification of a person among the pool of images. The main goal is to identify the face among the database of images. As the geometrical features of the face images are similar, distinguishing one face from other faces from the other base is challenging task. The Proposed work uses the Neural Network as classifier using Histogram of Oriented Gradients features of images. The proposed architecture uses Levenberg-Marquardt feed-forward training method for neural network. ORL data base is used and is implemented on VIRTEX-7 FPGA platform giving better recognition rate and high performance.
引用
收藏
页码：905 / 909
页数：5
相关论文
共 50 条
  • [21] Design and Implementation of Configurable Convolutional Neural Network on FPGA
    Huynh Vinh Phu
    Tran Minh Tan
    Phan Van Men
    Nguyen Van Hieu
    Truong Van Cuong
    PROCEEDINGS OF 2019 6TH NATIONAL FOUNDATION FOR SCIENCE AND TECHNOLOGY DEVELOPMENT (NAFOSTED) CONFERENCE ON INFORMATION AND COMPUTER SCIENCE (NICS), 2019, : 298 - 302
  • [22] An Efficient Architecture for Floating Point based MISO Neural Neworks on FPGA
    Laudani, Antonino
    Lozito, Gabriele Maria
    Fulginei, Francesco Riganti
    Salvini, Alessandro
    2014 UKSIM-AMSS 16TH INTERNATIONAL CONFERENCE ON COMPUTER MODELLING AND SIMULATION (UKSIM), 2014, : 12 - 17
  • [23] Digit Recognition Using Spiking Neural Networks on FPGA
    Koravuna, Shamini
    Sanaullah
    Jungeblut, Thorsten
    Rueckert, Ulrich
    ADVANCES IN COMPUTATIONAL INTELLIGENCE, IWANN 2023, PT I, 2023, 14134 : 406 - 417
  • [24] An FPGA-Based Energy-Efficient Reconfigurable Convolutional Neural Network Accelerator for Object Recognition Applications
    Li, Jixuan
    Un, Ka-Fai
    Yu, Wei-Han
    Mak, Pui-In
    Martins, Rui P.
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2021, 68 (09) : 3143 - 3147
  • [25] Architecture Design and FPGA Implementation of CORDIC Algorithm for Fingerprint Recognition Applications
    Revathi, P.
    Rao, M. V. Nageswara
    Locharla, G. R.
    2ND INTERNATIONAL CONFERENCE ON COMMUNICATION, COMPUTING & SECURITY [ICCCS-2012], 2012, 1 : 371 - 378
  • [26] Streaming Convolutional Neural Network FPGA Architecture for RFSoC Data Converters
    Maclellan, Andrew
    Crockett, Louise H.
    Stewart, Robert W.
    2023 21ST IEEE INTERREGIONAL NEWCAS CONFERENCE, NEWCAS, 2023,
  • [27] A Single Layer Architecture to FPGA Implementation of BP Artificial Neural Network
    Liu Shoushan
    Chen Yan
    Xu Wenshang
    Zhang Tongjun
    2010 2ND INTERNATIONAL ASIA CONFERENCE ON INFORMATICS IN CONTROL, AUTOMATION AND ROBOTICS (CAR 2010), VOL 2, 2010, : 258 - 264
  • [28] FPGA Implementation of Face Recognition System using Efficient 5/3 2D-Lifting Scheme
    Bhairannawar, Satish S.
    Kumar, Rajath
    Mirji, Varsha
    Sindhu, P. S.
    2016 INTERNATIONAL CONFERENCE ON VLSI SYSTEMS, ARCHITECTURES, TECHNOLOGY AND APPLICATIONS (VLSI-SATA), 2016,
  • [29] Modified Architecture for Real-Time Face Detection using FPGA
    Das, Suraj
    Jariwala, Atit
    Pinalkumar
    3RD NIRMA UNIVERSITY INTERNATIONAL CONFERENCE ON ENGINEERING (NUICONE 2012), 2012,
  • [30] A Novel Architecture on FPGA for Face Detection Using Jumping Scanning Mechanism
    Qin, Chao
    Che, Ming
    Li, Weichao
    CONTEMPORARY RESEARCH ON E-BUSINESS TECHNOLOGY AND STRATEGY, 2012, 332 : 169 - 175
12345