AN ACCURATE LARGE-SIGNAL MODEL FOR RF SOI LDMOS INCLUDING SELF-HEATING EFFECT

被引:0
作者
Wang, Huang [1 ]
Sun, Lingling
Yu, Zhiping [2 ]
Liu, Jun
机构
[1] Hangzhou Dianzi Univ, Minist Educ, Key Lab RF Circuits & Syst, Hangzhou 310037, Zhejiang, Peoples R China
[2] Tsinghua Univ, Inst Microelect, Beijing 100084, Peoples R China
来源
CIICT 2008: PROCEEDINGS OF CHINA-IRELAND INTERNATIONAL CONFERENCE ON INFORMATION AND COMMUNICATIONS TECHNOLOGIES 2008 | 2008年
基金
中国国家自然科学基金;
关键词
SOI LDMOS; large-signal model; MOS Model 20; harmonic power; Verilog-A;
D O I
暂无
中图分类号
TP39 [计算机的应用];
学科分类号
081203 ; 0835 ;
摘要
An accurate RF SOI LDMOS large-signal equivalent circuit model based on NXP MOS Model 20 (MM20) is presented. The avalanche effect and the power dissipation caused by self-heating are described. The RF parasitic elements are extracted directly from measured S-parameters with analytical methods. Then their final values are obtained quickly and accurately through necessary optimization. The model is validated in DC, AC small-signal, and large-signal analyses for an RF SOI LDMOS of 20-fingers (channel mask length, L=1 mu m, finger width, W=50 mu m) gate with high resistivity substrate and body-contact. Excellent agreement is achieved between simulated and measured results for DC, S-parameters (10MHz similar to 20.01GHz), and power characteristics, which shows our model is accurate and reliable. MM20 is improved for RF SOI LDMOS large-signal applications. This model has been implemented in Verilog-A using the ADS circuit simulator (hpeesofsim).
引用
收藏
页码:225 / +
页数:2
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