A physics based model for accumulation MOS capacitors

被引：8
|
作者：
Otín, A [1 ]
Celma, S [1 ]
Aldea, C [1 ]
机构：
[1] Univ Zaragoza, Fac Ciencias, Dept Ing Elect & Comunicac, Grp Diseno Elect, E-50009 Zaragoza, Spain
来源：
SOLID-STATE ELECTRONICS | 2004年 / 48卷 / 05期
关键词：
analog design; CMOS integrated circuits; MOS capacitor;
D O I：
10.1016/j.sse.2003.12.035
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
We present a physics based model for MOS capacitors in accumulation, which is able to give an accurate prediction of non-linear distortion. The key idea of this work is to include the depletion effects of the polysilicon gate and bulk in that model. Several test structures based on MOS capacitors in accumulation have been made with the aim of validating the model and exploring its potential applications to high performance analog circuits fabricated in pure digital CMOS technologies. Special care has been taken in reducing the substrate resistance. The model shows good agreement with experimental results. (C) 2004 Elsevier Ltd. All rights reserved.
引用
收藏
页码：773 / 779
页数：7
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