Fabrication of High-Performance Thin-Film Transistors on Glass Substrate by Atmospheric Pressure Micro-Thermal-Plasma-Jet-Induced Lateral Crystallization Technique

Amorphous silicon (a-Si) films deposited by plasma-enhanced chemical vapor deposition (PECVD) were patterned to strips with a width ranging from 1 to 50 mu m, and irradiated with an atmospheric pressure micro-thermal-plasma-jet (mu-TPJ) to induce high-speed lateral crystallization (HSLC). From electron backscattering diffraction patterns (EBSPs), the growth of similar to 20-mu m-long single grains was observed in a narrow line of 1 mu m width under a mu-TPJ scan speed as high as 4000 mm/s. TFTs with a large channel length (L)/width (W) of 40 mu m/50 mu m show a field-effect mobility (mu(FE)) of 284 cm(2) V-1 s(-1), whereas decreasing W monotonically increased mu(FE) to 477 cm2 V-1 s(-1) at W 2 mu m. By applying mu-TPJ to strip a-Si films, we can form single-crystalline Si at predetermined positions and obtain TFTs with reasonably high performance. We confirmed that HSLC is applicable to a-Si films on conventional glass substrates without crack generation by either inserting a buffer layer underneath a-Si films, or heating the samples during mu-TPJ irradiation. A new positioning method using a Si slit mask is also demonstrated. TFTs fabricated on glass with a buffer layer inserted underneath the a-Si films show a high mu(FE) of 267 cm(2) V-1 s(-1). (C) 2012 The Japan Society of Applied Physics