GaN-on-insulator technology for high-temperature electronics beyond 400°C

被引:20
作者
Herfurth, Patrick [1 ]
Maier, David [1 ]
Men, Yakiv [1 ]
Roesch, Rudolf [2 ]
Lugani, Lorenzo [3 ]
Carlin, Jean-Francois [3 ]
Grandjean, Nicolas [3 ]
Kohn, Erhard [1 ]
机构
[1] Univ Ulm, Inst Electron Devices & Circuits, D-89081 Ulm, Germany
[2] Univ Ulm, Inst Optoelect, D-89081 Ulm, Germany
[3] Ecole Polytech Fed Lausanne, Lab Adv Semicond Photon & Elect, CH-1015 Lausanne, Switzerland
基金
瑞士国家科学基金会;
关键词
Silicon on insulator technology - Threshold voltage - Aluminum nitride - Materials handling - Drain current - Gallium nitride - High electron mobility transistors - Sapphire;
D O I
10.1088/0268-1242/28/7/074026
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Lattice-matched InAlN/GaN high electron mobility transistors (HEMTs) have been prepared in a silicon-on-insulator (SOI)-like configuration. Here, this implies an ultrathin body 50 nm GaN channel/50 nm AlN nucleation layer material structure on sapphire with the active areas confined by mesa etching, resulting in semi-enhancement mode device characteristics. In contrast to conventional technologies, the device characteristics (maximum drain current, threshold voltage and 1 MHz large signal operation) change only within less than approx. 10% up to 600 degrees C compared to room temperature (RT). The current on/off ratio decreases from 10(10) at RT to 10(6) at 600 degrees C, due to residual defect activation. These first results of ultrathin body GaN-on-sapphire-based materials and device technology may indicate that essential improvements in the temperature-handling capability of electronic device structures beyond what is common at present may be possible with only limited sacrifice of device performance.
引用
收藏
页数:5
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