Current-mode phase-locked loop with constant-Q active inductor CCO and active transformer loop filter

被引:2
|
作者
Tang, Adrian [1 ]
Zhu, Guangyu [1 ]
Yuan, Fei [1 ]
机构
[1] Ryerson Univ, Dept Elect & Comp Engn, Toronto, ON, Canada
基金
加拿大自然科学与工程研究理事会;
关键词
Phase-locked loop; Active inductors; Active transformers;
D O I
10.1007/s10470-012-0004-8
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This paper presents a current-mode phase-locked loop (PLL) with a constant-Q CMOS active inductor current-controlled oscillator (CCO) and a CMOS current-mode active-transformer loop filter. The constant-Q active inductor provides a large and swing-independent quality factor such that the phase noise of the CCO utilizing the constant-Q active inductor is comparable to that of CCO with spiral inductors. The current-mode active-transformer loop filter offers the advantage of a large and tunable inductance and low silicon consumption such that the loop bandwidth of the PLL can be made small and tunable. The PLL was designed in TSMC-0.18 mu m 6-metal 1.8V CMOS technology and analyzed using SpectreRF from Cadence Design Systems with BSIM3v3 device models. The phase noise of the PLL was analyzed using Cadence's Verilog-AMS behavioral modeling. The phase noise of the CCO with the constant-Q active inductor is -123.1 dBc/Hz at 1 MHz frequency offset, over 10 dB better as compared with that of the CCO with conventional active inductors, and is only a few dB higher than that of the CCO with spiral inductors. The phase noise of the PLL with an active-transformer loop filter and a constant-Q CCO is -116 dBc/Hz at 1 MHz frequency offset, nearly 20 dB lower than that of the PLL with the same active-transformer loop filter and a conventional active-inductor CCO. The lock time, power consumption, and phase noise of the PLL are 60 ns, 34 mW, and -116 dBc/Hz at 1 MHz frequency offset, respectively. The total silicon consumption of the PLL excluding bond pads is 0.013 mm(2).
引用
收藏
页码:365 / 375
页数:11
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