Reversible Circuit Synthesis using Evolutionary Algorithm

被引:0
|
作者
Datta, Kamalika [1 ]
Sengupta, Indranil [2 ]
Rahaman, Hafizur [1 ]
机构
[1] Bengal Engn & Sci Univ, Dept Informat Technol, Sibpur 711103, Howrah, India
[2] Indian Inst Technol, Dept Comp Sci Engn, Kharagpur 721302, W Bengal, India
来源
2012 5TH INTERNATIONAL CONFERENCE ON COMPUTERS AND DEVICES FOR COMMUNICATION (CODEC) | 2012年
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
With the prospect of availability of quantum computers in not-so-distant future, research on the synthesis and testing of reversible logic circuits have gained momentum in recent years. There are many existing works for the synthesis of reversible logic circuits, some of them being exact while some others approximate and based on some heuristics. Many of these methods work for reasonably smaller circuits, but fail with the increase in the number of inputs, either in terms of large memory and computation time requirements, or in terms of failure in arriving at the solution. In this paper, we have proposed a synthesis approach that uses Genetic Algorithm (GA) for searching the solution space, and is based on a gate library consisting of NOT, CNOT and generalized Toffoli gates. This method gives good solutions to circuits with up to 5 or 6 inputs very fast. A divide-and-conquer approach is also proposed towards the end of the paper as a future work using which larger circuits can be handled.
引用
收藏
页数:4
相关论文
共 50 条
  • [21] Synthesis of Reversible Logic Circuit Using a Species Conservation Method
    Wang, Xiaoxiao
    Jiao, Licheng
    Wang, Xiaoxiao
    2014 10TH INTERNATIONAL CONFERENCE ON NATURAL COMPUTATION (ICNC), 2014, : 637 - 641
  • [22] Reversible Circuit Synthesis Using a Cycle-Based Approach
    Saeedi, Mehdi
    Zamani, Morteza Saheb
    Sedighi, Mehdi
    Sasanian, Zahra
    ACM JOURNAL ON EMERGING TECHNOLOGIES IN COMPUTING SYSTEMS, 2010, 6 (04)
  • [23] A Reversible Logical Circuit Synthesis Algorithm Based on Decomposition of Cycle Representations of Permutations
    Zhu, Wei
    Li, Zhiqiang
    Zhang, Gaoman
    Pan, Suhan
    Zhang, Wei
    INTERNATIONAL JOURNAL OF THEORETICAL PHYSICS, 2018, 57 (08) : 2466 - 2474
  • [24] Quantum-Inspired Tabu Search Algorithm for Reversible Logic Circuit Synthesis
    Wang, Wen-Hsin
    Chiu, Chia-Hui
    Kuo, Shu-Yu
    Huang, Sheng-Fei
    Chou, Yao-Hsin
    PROCEEDINGS 2012 IEEE INTERNATIONAL CONFERENCE ON SYSTEMS, MAN, AND CYBERNETICS (SMC), 2012, : 709 - 714
  • [25] A Reversible Logical Circuit Synthesis Algorithm Based on Decomposition of Cycle Representations of Permutations
    Wei Zhu
    Zhiqiang Li
    Gaoman Zhang
    Suhan Pan
    Wei Zhang
    International Journal of Theoretical Physics, 2018, 57 : 2466 - 2474
  • [26] A reversible circuit synthesis algorithm with progressive increase of controls in generalized Toffoli gates
    Dalcumune, Edinelco
    Brasil Kowada, Luis Antonio
    Ribeiro, Andre da Cunha
    Herrera de Figueiredo, Celina Miraglia
    Marquezino, Franklin de Lima
    JOURNAL OF UNIVERSAL COMPUTER SCIENCE, 2021, 27 (06) : 544 - 563
  • [27] A parallel evolutionary algorithm for circuit partitioning
    Baños, R
    Gil, C
    Montoya, MG
    Ortega, J
    ELEVENTH EUROMICRO CONFERENCE ON PARALLEL, DISTRIBUTED AND NETWORK-BASED PROCESSING, PROCEEDINGS, 2003, : 365 - 371
  • [28] Evolutionary algorithm for logic circuit synthesis with memristor-based implication gate
    Wang X.
    Jiao L.
    Li Y.
    Huazhong Keji Daxue Xuebao (Ziran Kexue Ban)/Journal of Huazhong University of Science and Technology (Natural Science Edition), 2016, 44 (10): : 70 - 76
  • [29] Reversible Circuit Synthesis With Particle Swarm Optimization Using Crossover Operator
    Podlaski, Krzysztof
    2015 22ND INTERNATIONAL CONFERENCE MIXED DESIGN OF INTEGRATED CIRCUITS & SYSTEMS (MIXDES), 2015, : 375 - 379
  • [30] Reversible circuit synthesis by genetic programming using dynamic gate libraries
    Mustapha Y. Abubakar
    Low Tang Jung
    Nordin Zakaria
    Ahmed Younes
    Abdel-Haleem Abdel-Aty
    Quantum Information Processing, 2017, 16