ESD-protected wideband CMOS LNAs using modified resistive feedback techniques with chip-on-board packaging

A novel modified resistive feedback structure for designing wideband low-noise amplifiers (LNAs) is proposed and demonstrated in this paper. Techniques including feedback through a source follower, an R-C feedback network, a gate peaking inductor inside the feedback loop, and neutralization capacitors are used. Bond-wire inductors and electrostatic devices (ESDs) are co-designed to improve the chip performance. Two LNAs, LNA1 and LNA2, were fabricated using a TSMC digital 90-nm CMOS technology. Both chips were tested on board using chip-on-board packages with ESD diodes added at the inputs and outputs. LNA1 achieves a 3-dB bandwidth of 9 GHz with 10 dB of power gain and a minimum noise figure (NF) of 4.2 dB. LNA2 achieves a 3-dB bandwidth of 3.2 GHz with 15.5 dB of power gain and a minimum NF of 1.76 dB. The two LNAs have third-order intermodulation intercept points of -8 and -9 dBm. Their power consumptions are 20 and 25 mW with a 1.2-V supply, respectively.