Test Scheduling with Built in Logic Block Observer for NoC Architecture

被引：0
作者：
Waseem, Shaik Mohammed [1 ]
Fatima, Afroz [2 ]
机构：
[1] APIIC IDA KDP, SMR Ind, Vijayawada, AP, India
[2] SD Int, London, ON, Canada
来源：
2017 INTERNATIONAL CONFERENCE ON INNOVATIVE MECHANISMS FOR INDUSTRY APPLICATIONS (ICIMIA) | 2017年
关键词：
Built In Logic Block Observer; Network on Chip; Test Scheduling; 7-Port Router; LFSR; BIST;
D O I：
暂无
中图分类号：
T [工业技术];
学科分类号：
08 ;
摘要：
Built In Logic Block Observer (BILBO) is being pursued as one of the best techniques to provide testability for SoCs (System on Chips) by researchers working in the field of Design for Fault Tolerance. With increase in complexity of Network on Chip (NoC) architectures, a centralized technique to test routers that are hosted on a SoC as part of NoC architecture is indeed the need of rapidly growing semiconductor industry. This paper, discusses the BILBO based testing for NoC architecture by scheduling test sessions for four 7-port routers. Further, the power and resource utilization reports are enumerated for the design and has been compared graphically with that of the conventional LFSR based BIST testing in order to adjudge the advantages of the former.
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页码：14 / 17
页数：4
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