FPGA Implementation of LSTM Based on Automatic Speech Recognition

被引：0

作者：

Li, Chen-Lu ^{[1
]}

Huang, Yu-Jie

Cai, Yu-Jie

Han, Jun

Zeng, Xiao-Yang

机构：

[1] Fudan Univ, Dept Microelect, Shanghai 200433, Peoples R China

来源：

2018 14TH IEEE INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUIT TECHNOLOGY (ICSICT) | 2018年

基金：

中国国家自然科学基金;

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Automatic speech recognition(ASR) remains very popular research area in recent years.Long Short-Term Memory(LSTM) is always used in speech recognition and demonstrated state-of-art accuracy. The high performance LSTM models is becoming increasing demanding in terms of computational and memory load. FPGA-based accelerators have attracted attention of researchers because of its high energy-efficiency and great flexibility.The main work of this paper is an efficient FPGA implementation of LSTM to accelerate the ASR algorithm,The proposed circuit is implemented at Zedboard 100 MHz.The amount of parameters are reduced more than 7 times because of compression method.

引用

页码：1258 / 1260

页数：3