Mixed-signal fault equivalence: search and evaluation

The aim of this paper is to reduce the fault simulation effort required for the evaluation of test effectiveness in mixed-signal circuits. Exhaustive simulation of basic analog and mixed-signal structures in the presence of individual faults is used to identify potentially equivalent faults. Fault equivalence is finally evaluated based on the simulation of all faults in a case study - a DCDC (switched buck converter). The number of transistor stuck-on and stuck-off faults that need to be simulated is reduced to 31% in the structures already processed by the proposed methodology. This approach is a significant contribution to make mixed-signal fault simulation possible as part of the production test preparation.