The effect of technology scaling on power dissipation in analog circuits

被引：16
作者：
Bult, K [1 ]
机构：
[1] Broadcom Netherlands, Bunnik, Netherlands
来源：
ANALOG CIRCUIT DESIGN: RF CIRCUITS: WIDE BAND, FRONT-ENDS,DAC'S, DESIGN METHODOLOGY AND VERIFICATION FOR RF AND MIXED-SIGNAL SYSTEMS, LOW POWER AND LOW VOLTAGE | 2006年
关键词：
D O I：
10.1007/1-4020-3885-2_13
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
A general approach for Power Dissipation estimates in Analog circuits as a function of Technology scaling is introduced. It is shown that as technology progresses to smaller dimensions and lower supply voltages, matching dominated circuits are expected to see a reduction in power dissipation whereas noise dominated circuits will see an increase. These finds are applied to ADC architectures like Flash and Pipeline ADC's and it is shown why Pipeline ADC's survive better on a high, thick-oxide supply voltage whereas Flash ADC's benefit from the technology's thinner oxides. As a result of these calculations an adaptation to the most popular Figure-of-Merit (FOM) for ADC's is proposed.
引用
收藏
页码：251 / 294
页数：44
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