Modeling and Reduction of Conducted EMI of Inverters With SiC JFETs on Insulated Metal Substrate

This paper presents the suppression of conducted common-mode (CM) electromagnetic interference (EMI) in an inverter for motor drive with discrete silicon carbide (SiC) JFETs attached on top of the insulated metal substrate (IMS). The EMC performance of the IMS inverter is compared with that of a heat sink inverter in a similar circuit layout. Both are under the same influence of parasitic capacitive couplings between the SiC JFET drains and the substrate base plate. It is found that although the application of conventional CM filters effectively suppresses the emitted noise in the low-frequency (LF) range, the influence of this capacitive coupling results in slight or no improvement in the middle-frequency (MF) and high-frequency (HF) ranges. To deal with this problem, a system CM equivalent circuit model with extracted parasitic parameters is proposed. The model is able to evaluate the filter insertion losses over a broad conducted EMI frequency band, which is essential to achieve an optimized filter design balanced between performance and cost. The presented experimental and calculated results form the step-by-step guideline that effectively suppresses the generated EMI to comply with the standard prescribed by IEC61800-3 C2: Qp.