High performance low power low voltage adder

被引：7

作者：

Wu, A

Ng, CK

机构：

[1] EDA Centre, Department of Electronic Engineering, City University of Hong Kong, Kowloon, Tat Chee Avenue

来源：

ELECTRONICS LETTERS | 1997年 / 33卷 / 08期

关键词：

adders; CMOS digital integrated circuits;

D O I：

10.1049/el:19970464

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A high performance adder has been designed for low power, low voltage applications. The proposed circuit has a better performance in terms of power consumption and area efficiency. To justify claims, simulation results of various high speed adders are compared. The proposed adder is comparably fast compared to the other adders.

引用

页码：681 / 682

页数：2

共 7 条

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