Hardware IP Protection During Evaluation Using Embedded Sequential Trojan

A low-cost solution for hardware IP protection during evaluation, by embedding a hardware Trojan inside an IP in the form of a finite state machine is proposed. The Trojan disrupts the normal functional behavior of the IP on occurrence of a sequence of rare events, thereby effectively putting an expiry date on the usage of the IP. The proposed technique is based on embedding a specially crafted finite state machine (FSM), which follows the structure of a sequential hardware Trojan (SHT) in the evaluation copy of a hardware IP. An illegal SoC containing a pirated evaluation copy of an IP would cease to follow the specified functionality after the evaluation period due to the presence of a sequential Trojan, which acts like a hardware time-bomb. To prevent potential reverse engineering of the modified IP aiming to isolate the Trojan, low-overhead design obfuscation techniques are implemented. It provides a designer adequate flexibility to evaluate it, while protecting the interest of the IP vendors.