The Design of a Low-Power Asynchronous DES Coprocessor for Sensor Network Encryption

被引:3
|
作者
Liu, Yijun [1 ]
Chen, Pinghua [1 ]
Xie, Guobo [1 ]
Liu, Zhusong [1 ]
Li, Zhenkun [1 ]
机构
[1] Guangdong Univ Technol, Fac Comp, Guangzhou 510006, Guangdong, Peoples R China
来源
ISCSCT 2008: INTERNATIONAL SYMPOSIUM ON COMPUTER SCIENCE AND COMPUTATIONAL TECHNOLOGY, VOL 2, PROCEEDINGS | 2008年
关键词
DES; Encryption; Coprocessor; Low-power; Asynchronous;
D O I
10.1109/ISCSCT.2008.228
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
Sensor network nodes have a very tight power budget and the power efficiency is the biggest design concern in sensor network circuits. A general-purpose processor (e.g. an ARM processor) is not efficient to execute encryption algorithms because it has no special instructions to support encryption operations, for example very often-used permutation operations. In the paper, we propose a low-power ASIC encryption coprocessor for sensor network nodes. A DES algorithm is used because the algorithm does not include power-hungry and complex mathematic operations, such as multiplication, division and addition. An asynchronous logic style is used to design the coprocessor. With an asynchronous controller, a global clock is not necessary when idle, resulting in zero standby dynamic power. Using the DES coprocessor, the power consumed by encryption can be saved by 4 orders of magnitude than a pure software calculation.
引用
收藏
页码:190 / 193
页数:4
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