THE IMPLEMENTATION OF CHANNELIZED RECEIVER THROUGH FPGA

被引：0

作者：

Huang Xiaohong ^{[1
]}

Xu Xianyin ^{[1
]}

机构：

[1] Hebei Polytech Univ, Coll Informat Engn, Tangshan 063000, Peoples R China

来源：

FIFTH INTERNATIONAL CONFERENCE ON ADVANCED COMPUTER THEORY AND ENGINEERING (ICACTE 2012) | 2012年

关键词：

Channelization; polyphase filter; FPGA;

D O I：

暂无

中图分类号：

TP39 [计算机的应用];

学科分类号：

081203 ; 0835 ;

摘要：

The channelized receiver is obtained by polyphase filter banks, which makes Multi-channel signals received parallel. The channelizing is realized in the FPGA device of xc4vsx55 which belongs to Virtex4 group in Xilinx family. During the process of design, highly effective of polyphase and the parallel assembly line structure's FFT flexibility are fully considered, which reduce the operand enormously and raise the operating speed. Simulation is gotten by using combined simulation of ISE, Modelsim and Matlab, the result is confirmed effective.

引用

页码：809 / 816

页数：8

共 50 条

[31] FPGA implementation of an iterative receiver for MIMO-OFDM systems
Boher, Laurent
Rabineau, Rodrigue
Helard, Maryline
IEEE JOURNAL ON SELECTED AREAS IN COMMUNICATIONS, 2008, 26 (06) : 857 - 866
[32] FPGA Implementation of NLMS Algorithm for Receiver in wireless communication system
Rekha, K. R.
Nagabushan, B. S.
Nataraj, K. R.
INTERNATIONAL JOURNAL OF COMPUTER SCIENCE AND NETWORK SECURITY, 2010, 10 (12): : 72 - 86
[33] SDR - IMPLEMENTATION OF LOW FREQUENCY TRANS-RECEIVER ON FPGA
Shahana, K.
Gupta, Ravi Kumar
Parikh, K. S.
2014 INTERNATIONAL CONFERENCE ON SIGNAL PROCESSING AND INTEGRATED NETWORKS (SPIN), 2014, : 371 - 376
[34] Area Efficient Implementation of FSK Receiver on Xilinx Zynq FPGA
Reddy, T. Thammi
Madhavi, B. K.
Kishore, K. Lal
2016 INTERNATIONAL CONFERENCE ON INVENTIVE COMPUTATION TECHNOLOGIES (ICICT), VOL 1, 2016, : 184 - 190
[35] FPGA implementation of digital timing recovery in software radio receiver
Wu, YC
Ng, TS
2000 IEEE ASIA-PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS: ELECTRONIC COMMUNICATION SYSTEMS, 2000, : 703 - 707
[36] Design and implementation of FPGA-based FSKIF digital receiver
Yang, Shuiwang
Wu, Zhilu
Ren, Guanghui
ISSCAA 2006: 1ST INTERNATIONAL SYMPOSIUM ON SYSTEMS AND CONTROL IN AEROSPACE AND ASTRONAUTICS, VOLS 1AND 2, 2006, : 819 - +
[37] FPGA Implementation of High-Frequency Software Radio Receiver
Vucic, Mladen
Molnar, Goran
Butorac, Marko
ISCAS: 2009 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-5, 2009, : 1040 - 1043
[38] Baseband implementation of OTR-UWB receiver using FPGA
Gharaee, Hossein
Nabavi, Abdolreza
AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS, 2010, 64 (03) : 258 - 266
[39] Performance of Instantaneous Microwave Analysis by Parametric Channelized Receiver Through Time Domain Monitoring
Bres, Camille-Sophie
Wiberg, Andreas O. J.
Zlatanovic, Sanja
Radic, Stojan
JOURNAL OF LIGHTWAVE TECHNOLOGY, 2012, 30 (20) : 3192 - 3198
[40] Efficient wideband digital channelized monobit receiver
Chang, Hong
Zhao, Guo-Qing
Shenyang Gongye Daxue Xuebao/Journal of Shenyang University of Technology, 2010, 32 (02): : 212 - 216

← 1 2 3 4 5 →