Reduction of pump current mismatch in charge-pump PLL

被引:71
作者
Hwang, M. -S. [1 ]
Kim, J. [2 ]
Jeong, D. -K. [1 ]
机构
[1] Seoul Natl Univ, Sch Elect Engn & Comp Sci, Seoul 151742, South Korea
[2] Rambus Inc, Los Altos, CA 94022 USA
关键词
Compendex;
D O I
10.1049/el:20092727
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A charge pump that minimises the mismatch between the charging and discharging currents and keeps the currents constant across a wide output voltage range is described. The improved current matching helps reduce the static phase offset and reference spur of a charge-pump phase-locked loop (PLL) and the constant currents help control the PLL dynamics precisely. The proposed charge pump with dual compensation circuits demonstrates current mismatch of less than 3.2% and pump-current variation of 1.7% over the output voltage ranging from 0.2 to 1.0 V in the 0.13 mu m CMOS process with 1.2 V supply.
引用
收藏
页码:135 / 136
页数:2
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