Design of Low Power High Linearity Front-End Circuit with a Novel LNA Architecture

被引：0
|
作者：
Wu, Chang-Hsi [1 ]
Lin, Yu-Po [1 ]
机构：
[1] Lunghwa Univ Sci & Technol, Dept Elect Engn, 300 Wan Shou Rd Sec 1, Taoyuan 33306, Taiwan
来源：
2010 ASIA-PACIFIC MICROWAVE CONFERENCE | 2010年
关键词：
LNA; Current-bleeding; current-enhanced; Mixer; FOLDED-SWITCHING MIXER;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A low-power high-linearity front-end circuit with a novel low-noise amplifier (LNA) architecture based on CMOS 0.18 mu m process is presented in this paper. The conversion gain of the proposed front-end circuit is mainly boosted by current enhanced technique and current-bleeding technique. To improve the linearity and noise, a complementary common-gate LNA is employed. The proposed front-end circuit achieves measured conversion gain of 18.4dB and input third-order intercept point (IIP3) of -6 dBm under consuming power of 9.4 mW from 1.8V supply voltage. The noise figure is 8.4 dB at 100 MHz IF frequency. The size of the chip is 0.767mm x 0.96mm
引用
收藏
页码：358 / 361
页数：4
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