Performance Enhancement of FinFETs at Low Temperature

被引:0
作者
Maiti, C. K. [1 ]
Dash, T. P. [1 ]
Dey, S. [1 ]
机构
[1] Siksha O Anusandhan Univ, Dept Elect & Commun Engn, Bhubaneswar 751030, Orissa, India
来源
PROCEEDINGS OF 2ND INTERNATIONAL CONFERENCE ON 2017 DEVICES FOR INTEGRATED CIRCUIT (DEVIC) | 2017年
关键词
FinFET; low-temperature electronics; TCAD;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this work, performance analysis of strain-engineered MOSFETs has been performed through the use of the three temperature-dependent piezoresistive coefficients of silicon. As stress has a major impact on transistor characteristics in advanced devices, stress effects need to be determined from simulation in order to study the influence of from stress-related effects. We have investigated the effects of low temperature on the electrical performance of FinFETs. The physics-based 3D device simulation tool VictoryDevice is used for the simulations and characterization of the electrical properties of FinFETs. Performance enhancement is observed at low temperature.
引用
收藏
页码:35 / 39
页数:5
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